The invention relates to semiconductor memory devices, and more particularly, to semiconductor memory devices with reducing operating voltage in a stand-by state.
Semiconductor memory devices are employed in a variety of portable appliances, and a battery typically serves as a power source. In order to extend battery life as long as possible, current consumption must be reduced both driving and when in a stand-by mode. Therefore, reduced power consumption of a semiconductor memory device is desirable.
In typical semiconductor memory devices, such as dynamic random access memory (DRAM), a word line is boosted to a potential higher than a power supply potential Vcc (hereinafter referred to as a “boosted power supply potential Vpp”) in order to store an H (logical high) level which is equal to the power supply potential Vcc in a memory cell.
FIG. 1 shows an internal booster circuit and a word line driving circuit (word line driver) in the conversional DRAM. As shown, an internal booster circuit 20 generates, based on the externally supplied power supply potential Vcc, the boosted power supply potential Vpp exceeding the power supply potential Vcc. A word line driver WD is activated/deactivated in response to a decode signal from a decoder unit DU. Word line driver WD comprises a CMOS inverter including a P channel MOS transistor Q1 and an N channel MOS transistor Q2. The Decoder unit DU and word line driver WD are powered by the boosted power supply potential Vpp from internal booster circuit 20.
Generally, although P channel MOS transistor Q1 is in an off state when in stand-by, a small through current Is (also called subthreshold current) flows from the source to the drain in P channel MOS transistor Q1. The through current Is produced by word line driver WD becomes larger than those in the other transistors in the peripheral circuits.
Since a 64 MB DRAM, for example, includes 32000 word lines and 32000 word line drivers in total, the sum of the through currents grows extremely large. As a result, the output potential of internal booster circuit 20 is reduced from the predetermined boosted power supply potential Vpp. Internal booster circuit 20 operates to return the reduced output potential to the original boosted power supply potential, and thus, current consumption increases.